?1 CXG1006N 8 pin ssop (plastic) e95z31a66-st high-frequency spdt antenna switch description the CXG1006N is a high power antenna switch mmic. this ic is designed using the sony's gaas j- fet process and operates at a single positive power supply. features single positive power supply operation low insertion loss 0.5db (typ.) at 2.0ghz high isolation 27db (typ.) at 2.0ghz high power switching p1db (typ.) 32dbm at 2.0ghz v ctl (h) = 2.0v 34dbm at 2.0ghz v ctl (h) = 4.0v application antenna switch for digital cellular telephones structure gaas j-fet mmic absolute maximum ratings (ta = 25?) control voltage vctl 7 v operating temperature topr ?5 to +85 ? storage temperature tstg ?5 to +150 ? operating condition control voltage 0/4 v sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits.
?2 CXG1006N electrical characteristics v ctl (l) = 0v, v ctl (h) = 4v, p in = 30dbm, r rf = 75k (ta = 25?) item insertion loss isolation insertion loss isolation insertion loss isolation vswr switching time symbol il1 iso1 il1.5 iso1.5 il2 iso2 vswr tsw test condition f = 1.0ghz f = 1.5ghz f = 2.0ghz min. 35 29 24 typ. 0.3 40 0.4 32 0.5 27 100 max. 0.6 0.7 0.8 1.5 unit db db db db db db ns v ctl (l) = 0v, f = 2ghz (ta = 25?) item 1db compression point 1db compression point v ctla v ctlb high low low high port1-port2 on port1-port3 off port1-port2 off port1-port3 on symbol p1db (3) p1db (4) test condition v ctl (h) = 3v v ctl (h) = 4v min. 30 32 typ. 32 34 max. unit dbm dbm v ctl (l) = 0v, r rf = 75k (ta = 25?) item control current control current control current symbol i ctl (1) i ctl (2) i ctl (3) test condition v ctl (h) = 3v v ctl (h) = 4v v ctl (h) = 5v min. typ. 100 150 200 max. 170 220 270 unit ? ? ? ctlb port1 gnd ctla gnd gnd port2 port3 8 pin ssop (plastic) 2 3 4 5 6 7 8 1 package outline/pin configulation port1 port2 port3 block diagram
?3 CXG1006N recommended circuit 100pf 100pf ctlb port1 ctla port3 port2 100pf 100pf 100pf 1 2 3 4 5 6 7 8 r rf 75k w r rf 75k w * r rf is used to stabilize the electrical characteristics at high power signal input example of representive characteristics (ta = 25?) aaaaaaaaaaa a aaaaaaaaa a a aaaaaaaaa a a aaaaaaaaa a a aaaaaaaaa a a aaaaaaaaa a a aaaaaaaaa a aaaaaaaaaaa 0 ? ? ? 0 ?0 ?0 ?0 24 28 32 40 36 44 insertion loss [db] isolation [db] vctl(h)=3v vctl(h)=4v v ctl (h) = 5v v ctl (h) = 4v v ctl (h) = 3v insertion loss insertion loss and isolation vs. input power input power [dbm] isolation @2.0ghz 3 2 1 0 ? ? ? ? ? 0 ?0 ?0 ?0 ?0 ?0 0 frequency [ghz] insertion loss [db] isolation [db] insertion loss isolation insertion loss and isolation vs. frequency v ctl (h) = 3v v ctl (h) = 4v v ctl (h) = 5v
?4 CXG1006N package outline unit: mm sony code eiaj code jedec code package material lead treatment lead material package weight epoxy resin solder / palladium copper alloy package structure ssop-8p-l01 plating ssop008-p-0044 0.04g 8pin ssop (plastic) 0.24 ?0.07 + 0.08 0.65 * 3.0 0.1 * 4.4 0.1 1.25 ?0.1 + 0.2 0.1 a 6.4 0.2 b 0.24 ?0.07 + 0.08 (0.22) 0.17 ?0.015 + 0.025 (0.15) 0.1 0.05 0.25 0?to 10 0.6 0.15 (0.5) 1 4 5 8 0.13 m detail b a detail note: dimension * ?does not include mold protrusion.
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